Simulator papers

Dynamic binary translation related papers

Mark Probst. "Fast Machine-Adaptable Dynamic Binary Translation". Workshop on Binary Translation 2001.

Reflects an earlier state in the development of bintrans

Mark Probst. "Dynamic Binary Translation". UKUUG Linux Developer's Conference 2002.

An overview over dynamic binary translation in general and bintrans in particular.

Bob Cmelik, David Keppel. "Shade: A Fast Instruction-Set Simulatorfor Execution Profiling". Sun Microsystems, Inc. University of Washington. 1993.

This paper describes a tool called Shade which combines efficient instruction-set simulation with a flexible, extensible trace generation capability. Efficiency is achieved by dynamically compiling and caching code to simulate and trace the application program. The user may control the extent of tracing in a variety of ways; arbitrarily detailed application state information may be collected during the simulation, but tracing less translates directly into greater efficiency. This paper describes the capabilities, design, implementation, and performance of Shade, and discusses instruction set emulation in general.

Interpreter related papers

Robert C. Bedichek. "Some Efficient Architecture Simulation Techniques". Department of Computer Science, University of Washington Seattle, Washington 98195.

An efficient simulator for the Motorola 88000 at the ISA (Instruction Set Architecture) level is described. By translating instructions on the fly to a quick-to-execute form we achieve an average ratio of 20 simulator host instructions executed per simulated instruction. Lazy allocation of memory allows large memories to be modelled with low start-up time. We describe our experience using the simulator to develop workstation software. The simulator's speed and extensive I/O device modelling made it possible for us to interactively debug and test a UNIX(R) kernel and diagnostic software well before the hardware was available. Extensions to closely model caches and multiprocessors are sketched.

Robert C. Bedichek. "Talisman: Fast and Accurate Multicomputer Simulation".

Talisman is a simulator that models the execution semantics andtiming of a multicomputer. Talisman is unique in combining high semantic accuracy, high timing accuracy, portability, and good performance. This good performance allows users to run significant programs on large simulated multicomputers. The combination of high accuracy and good performance yields an ideal tool for evaluating architectural trade-offs. Talisman models the semantics of virtual memory, a circuit-switched internode interconnect, I/O devices, and instruction execution in both user and supervisor modes.It also models the timing of processor pipelines, caches, local memory buses, and a circuit-switched interconnect. Talisman executesthe same program binary images as a hardware prototype at a cost of about 100 host instructions per simulated instruction.

SimICS related papers

Peter S. Magnusson. David Samuelsson. "A Compact Intermediate Format for SIMICS". Swedish Institute of Computer Science.

Instruction set architecture (ISA) simulators are an increasingly popular class of tools for both research and commercial purposes. Common applications include trace generation, program development, and compatibility support. A major concern with ISA simulators is performance and memory overhead. A common technique for achieving good performance is to use threaded code, which involves translating the target object code to an intermediate format which is subsequently interpreted.

Peter S. Magnusson. Bengt Werner. "Some Efficient Techniques for Simulating Memory". Swedish Institute of Computer Science.

(see paper below)

Peter S. Magnusson. Bengt Werner. "Efficient Memory Simulation in SimICS". Swedish Institute of Computer Science.

We describe novel techniques used for efficient simulation of memory in SimICS, an instruction level simulator developed at SICS. The design has focused on efficiently supporting the simulation of multiprocessors, analyzing complex memory hierarchies and running large binaries with a mixture of system-level and user-level code.

Peter S. Magnusson et al. "SimICS/sun4m: A VIRTUAL WORKSTATION". Usenix 1998.

System level simulators allow computer architects and system software designers to recreate an accurate and complete replica of the program behavior of a target system, regardless of the availability, existence, or instrumentation support of such a system. Applications include evaluation of architectural design alternatives as well as software engineering tasks such as traditional debugging and performance tuning.

Peter S. Magnusson. "Efficient Instruction Cache Simulation and Execution Profiling with a threaded-code interpreter". Swedish Institute of Computer Science.

Presents an extention to the an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses.

Peter S. Magnusson. "Partial Translation". Swedish Institute of Computer Science.

Traditional simulation of a target architecture by interpreting object code can be improved by translating the object code to an intermediate format. This approach is called interpretive translation. Despite a substantial performance improvement over traditional interpretation, a large part of the overhead is unnecessary. An alternative approach is block translation, where one or more simulated instructions are translated to directly executable code.