Cache management facilities specific to RISC-V systems that implement the Linux ABI are declared in sys/cachectl.h.
Preliminary: | MT-Safe | AS-Safe | AC-Safe | See POSIX Safety Concepts.
Enforce ordering between stores and instruction cache fetches. The range of
addresses over which ordering is enforced is specified by start and
end. The flags argument controls the extent of this ordering, with
the default behavior (a flags value of 0) being to enforce the fence on
all threads in the current process. Setting the
SYS_RISCV_FLUSH_ICACHE_LOCAL bit allows users to indicate that enforcing
ordering on only the current thread is necessary. All other flag bits are