One other variable is available for you to customize VHDL Mode:
vhdl-special-indent-hook. This is a standard hook variable that
is called after every line is indented by VHDL Mode. You can use
it to do any special indentation or line adjustments your style
dictates, such as adding extra indentation to the port map clause in a
component instantiation, etc. Note however, that you should not change
point or mark inside your vhdl-special-indent-hook
functions.